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| DOI | 10.1109/TIE.2016.2632058 | ||||
| Año | 2017 | ||||
| Tipo | artículo de investigación |
Citas Totales
Autores Afiliación Chile
Instituciones Chile
% Participación
Internacional
Autores
Afiliación Extranjera
Instituciones
Extranjeras
This paper is focused on improving the post-fault performance of cascaded H-bridge multilevel inverters by decreasing the common-mode voltage. First, an algorithm is proposed to determine the optimal post-fault state among all possible states, which have the same maximum available voltage. Furthermore, a modified technique is proposed to calculate the references of inverter phase voltages under faulty conditions. This technique leads to a decrease in the common-mode voltage when the required output voltage is less than its maximum value. These solutions are mutually employed in the post-fault control system. Simulation and experimental results confirm the effectiveness of the proposed solutions in comparison with the existing methods in different cases.
| Ord. | Autor | Género | Institución - País |
|---|---|---|---|
| 1 | Ouni, Saeed | Hombre |
Sharif Univ Technol - Iran
Sharif University of Technology - Iran |
| 2 | Zolghadri, MohammadReza | Hombre |
Sharif Univ Technol - Iran
Sharif University of Technology - Iran |
| 3 | Khodabandeh, Masih | - |
Sharif Univ Technol - Iran
Sharif University of Technology - Iran |
| 4 | Shahbazi, Mahmoud | Hombre |
Univ Durham - Reino Unido
University of Durham - Reino Unido Durham University - Reino Unido |
| 5 | RODRIGUEZ-PEREZ, JOSE RAMON | Hombre |
Universidad Nacional Andrés Bello - Chile
|
| 6 | Oraee, Hashem | Hombre |
Sharif Univ Technol - Iran
Sharif University of Technology - Iran |
| 7 | LEZANA-ILLESCA, PABLO | Hombre |
Universidad Técnica Federico Santa María - Chile
|
| 8 | Ulloa Schmeisser, Andres | Hombre |
Universidad Técnica Federico Santa María - Chile
|
| Fuente |
|---|
| Chilean Research Council (CONICYT) |
| Sharif University of Technology |
| Universidad Andres Bello, Chile |
| Agradecimiento |
|---|
| This work was supported in part by Sharif University of Technology under Grant G930719, in part by the Chilean Research Council (CONICYT) under Grant Basal Project FB0008: Advanced Center for Electrical and Electronics Engineering (AC3E), and in part by the Universidad Andres Bello, Chile. |