The following work presents a decoupled level-shifted PWM (DLS-PWM) scheme for its application in a Nine-switch converter. The converter topology is based on two classical two-level converters sharing a positive and a negative busbar respectively. This particular topology allows the independent operation of two three-phase loads with a single DC link, thus leading to the need of introducing an offset of each of the modulation signals. The proposed modulation scheme allows the decoupling of the modulation signals, while taking advantage of using the complete linear modulation region. In order to have a better understanding of topology, the stress factor of the converter, the design factor and his performance at a oriented control in an UPS application, will be defined. On the other hand, an analysis was conducted from the perspective power losses in the semiconductors, resulting in an asymmetric distribution in the semiconductors. The upper and lower switches showed higher losses compared to the intermediate switch, which is an important factor to consider. Lastly, all the results were validated by the Hardware In The Loop (HIL).