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| DOI | 10.1109/ICA-ACCA56767.2022.10005992 | ||
| Año | 2022 | ||
| Tipo |
Citas Totales
Autores Afiliación Chile
Instituciones Chile
% Participación
Internacional
Autores
Afiliación Extranjera
Instituciones
Extranjeras
Multilevel inverters are significant in high-power medium voltage applications. The multilevel inverter (MLI) architecture was developed with the intent of lowering the number of circuit components while increasing the output's level count. Due to its excellent efficiency, low cost, and simplicity of control for outputs with a greater number of levels, MLIs with reduced components are popular. Using asymmetric DC sources, the suggested architecture delivers output voltage of 13-level with four dc voltage sources and 10 switches. To get a better output voltage waveform, fundamental frequency method was employed to produce the switches' gate pulses. To test the inverter's performance for resistive, reactive and change in resistive and reactive loads, simulation work is carried out using Matlab/Simulink. Inverter performance is evaluated in terms of THD based on simulation results.
| Ord. | Autor | Género | Institución - País |
|---|---|---|---|
| 1 | Vijayaraja, L. | - |
Sri Sai Ram Institute of Technology - India
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| 2 | Yanusha, N. | - |
Anna University - India
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| 3 | Ganesh Kumar, S. | - |
Anna University - India
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| 4 | Rivera, Marco | Hombre |
Universidad de Talca - Chile
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