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| Indexado |
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| DOI | 10.1109/OJIES.2021.3060791 | ||||
| Año | 2021 | ||||
| Tipo | artículo de investigación |
Citas Totales
Autores Afiliación Chile
Instituciones Chile
% Participación
Internacional
Autores
Afiliación Extranjera
Instituciones
Extranjeras
The modular multilevel converter (MMC) is currently one of the power converter topologies which has attracted more research and development worldwide. Its features, such as high quality of voltages and currents, high modularity and high voltage rating, have made the MMC a very good option for several applications including high-voltage dc (HVdc) transmission, static compensators (STATCOMs), and motor drives. However, its unique features such as the large number of submodules, floating capacitor voltages, and circulating currents require a dedicated control system able to manage the terminal variables, as well as the internal variables with high dynamical performance. In this paper, a review of the research and development achieved during the last years on MMCs is shown, focusing on the challenges and proposed solutions for this power converter still faces in terms of modeling, control, reliability, power topologies, and new applications.
| Ord. | Autor | Género | Institución - País |
|---|---|---|---|
| 1 | PEREZ-LEIVA, MARCELO ALEJANDRO | Hombre |
Universidad Técnica Federico Santa María - Chile
|
| 2 | Ceballos, Salvador | Hombre |
Basque Res & Technol Alliance BRTA - España
Basque Research and Technology Alliance (BRTA) - España |
| 3 | Konstantinou, Georgios | Hombre |
UNSW Sydney Univ New South Wales - Australia
UNSW Sydney - Australia |
| 4 | Pou, Josep | Hombre |
Nanyang Technol Univ - Singapur
School of Electrical and Electronic Engineering - Singapur |
| 5 | AGUILERA-ECHEVERRIA, RICARDO PATRICIO | Hombre |
Univ Technol Sydney - Australia
University of Technology Sydney - Australia |
| Fuente |
|---|
| FONDECYT |
| Australian Research Council |
| SERC Chile |
| Office of Naval Research Global |
| Australian Government through the Australian Research Council |
| Advanced Center for Electrical and Electronics Engineering AC3E |
| ARC DECRA |
| Spanish Centre for the Development of Industrial Technology (CDTI) through the "Cervera" program |
| Agradecimiento |
|---|
| This work was supported in part by the Fondecyt Project 1181839, in part by the Advanced Center for Electrical and Electronics Engineering AC3E (CONICYT/FB0008), in part by SERC Chile (CONICYT/FONDAP/15 110 019), in part by ARC DECRA DE170010370, in part by the Office of Naval Research Global under Grant N62909-19-1-2081, in part by the Australian Government through the Australian Research Council (Discovery Project No. DP180100129), and in part by the Spanish Centre for the Development of Industrial Technology (CDTI) through the "Cervera" program under the grant agreement CER-20191002 ENERISLA. |