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| DOI | 10.1016/J.FUTURE.2020.07.006 | ||||
| Año | 2020 | ||||
| Tipo | artículo de investigación |
Citas Totales
Autores Afiliación Chile
Instituciones Chile
% Participación
Internacional
Autores
Afiliación Extranjera
Instituciones
Extranjeras
This work proposes a new approach for mapping GPU threads onto a family of discrete embedded 2D fractals. A block-space map λ:ZE2↦ZF2 is proposed, from Euclidean parallel space E to embedded fractal space F, that maps in O(log2log2(n)) time and uses no more than O(nH) threads with H being the Hausdorff dimension of the fractal, making it parallel space efficient. When compared to a bounding-box (BB) approach, λ(ω) offers a sub-exponential improvement in parallel space and a monotonically increasing speedup n≥n0. The Sierpinski gasket fractal is used as a particular case study and the experimental performance results show that λ(ω) reaches up to 9× of speedup over the bounding-box approach. A tensor-core based implementation of λ(ω) is also proposed for modern GPUs, providing up to ∼40% of extra performance. The results obtained in this work show that doing efficient GPU thread mapping on fractal domains can significantly improve the performance of several applications that work with this type of geometry.
| Revista | ISSN |
|---|---|
| Future Generation Computer Systems The International #Journal Of Grid Computing And E Science | 0167-739X |
| Ord. | Autor | Género | Institución - País |
|---|---|---|---|
| 1 | NAVARRO-GUERRERO, CRISTOBAL ALEJANDRO | Hombre |
Universidad Austral de Chile - Chile
|
| 2 | Quezada, Felipe A. | Hombre |
Universidad Austral de Chile - Chile
|
| 3 | HITSCHFELD-KAHLER, NANCY VIOLA | Mujer |
Universidad de Chile - Chile
|
| 4 | Vega, Raimundo | Hombre |
Universidad Austral de Chile - Chile
|
| 5 | BUSTOS-CARDENAS, BENJAMIN EUGENIO | Hombre |
Universidad de Chile - Chile
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| Fuente |
|---|
| Universidad de Chile |
| Fondo Nacional de Desarrollo Científico y Tecnológico |
| Comisión Nacional de Investigación Científica y Tecnológica |
| Comisión Nacional de Investigación CientÃfica y Tecnológica |
| Fondo Nacional de Desarrollo CientÃfico y Tecnológico |
| IMFD |
| Nvidia CUDA Research Center at the Department of Computer Science (DCC) from University of Chile |
| CUDA |
| ANID |
| Agencia Nacional de Investigación y Desarrollo |
| research project FONDECYT from ANID (CONICYT), Chile |
| Millenium Institute Foundational Research on Data (IMFD), Chile |
| Agradecimiento |
|---|
| This work was supported by the research project FONDECYT No11180881 and 1181506, both from ANID (ex CONICYT), Chile, as well as by the Nvidia CUDA Research Center at the Department of Computer Science (DCC) from University of Chile and the Millenium Institute Foundational Research on Data (IMFD), Chile. |
| This work was supported by the research project FONDECYT No 11180881 and 1181506, both from ANID (ex CONICYT), Chile, as well as by the Nvidia CUDA Research Center at the Department of Computer Science (DCC) from University of Chile and the Millenium Institute Foundational Research on Data (IMFD), Chile. |